| 2.28.1 The following table contains MIPS assembly code for a lock. Refer to the definition of the ll and sc pairs of MIPS instructions. a. try: MOV R3,R4 LL R2,0(R2) ADDI R2,R2, 1 SC R3,0(R1) BEQZ R3,try MOV R4,R2 [5] <2.11> For each test and fail of the store conditional, how many instructions need to be executed? | |
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